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Researchers from QuEra Computing, Harvard University and Anthropic used Claude with an automated correctness evaluator to search for more resource-efficient quantum circuits. Their preprint reports reductions in gate and qubit requirements across seven of eight building blocks, including a 12-fold reduction in Toffoli gates for a Reed-Solomon decoder; the results are estimates, not demonstrations on quantum hardware.

Researchers from QuEra Computing, Harvard University and Anthropic used Anthropic’s Claude model and an automated evaluator to design quantum circuits with lower estimated gate and qubit requirements across seven of eight computational building blocks, according to a preprint highlighted by QuEra on November 10. The work could help reduce the resources future fault-tolerant quantum computers need for some calculations, but the reported circuits are resource estimates, not results from hardware runs.

The study, titled “Discovering State-of-the-Art Quantum Circuits with Large Language Models,” is available as an arXiv preprint (2610.22367). The researchers paired Claude with a separate automated evaluator that checked whether proposed circuits were correct and scored their Toffoli-gate counts and qubit counts. Claude used the evaluator’s feedback to refine its designs.

Among the examples reported, the team reduced the Toffoli-gate count for a Reed-Solomon decoder from 5.1 million to about 440,000, a roughly 12-fold reduction, while also using fewer qubits. For a Coulomb-potential calculation, the reported counts fell from 6,355 to 1,140 Toffoli gates and from 252 to 142 qubits. The researchers said those changes represented a 9.9-fold reduction in a combined resource metric.

A fixed-point Gaussian function showed the largest reported change in that combined metric: a 39-fold reduction, with Toffoli gates falling from about 24,000 to 1,583 and qubits from 362 to 139. The metric multiplies gate count by peak logical-qubit count; it is not a measure of speedup. The team also described a new reversible method for modular inversion, offering different trade-offs between gate use and qubit use.

At a glance
reportWhen: Preprint published October 2026; QuEra…
The developmentA research team from QuEra, Harvard and Anthropic published a preprint describing AI-assisted quantum circuit designs with lower estimated resource requirements.

Lower Costs for Quantum Algorithms

The work targets a central constraint on useful quantum computing: algorithms must fit within the capabilities of hardware, including the number of logical qubits available and the operations that can be performed reliably. Reducing both gate and qubit requirements for important subroutines could make some larger calculations more feasible on future fault-tolerant machines.

That potential is not the same as a demonstrated application. The results concern individual computational building blocks, and their impact on a complete algorithm depends on how often and in what way each component is used. Estimates of logical resources also do not, by themselves, establish the runtime or physical hardware requirements of a particular system.

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How the Circuit Search Worked

Quantum circuits must often use reversible operations, which can make classical techniques expensive to adapt: information that a classical calculation would discard may need to be retained or reconstructed. The researchers’ search focused on eight building blocks used within larger quantum algorithms, including components related to optimization, chemistry and numerical computation.

Claude did not independently certify its own answers. An independent automated evaluator checked correctness and scored resource use, providing feedback for subsequent designs. QuEra also cited earlier work with Anthropic on laser-control software: the company said a Claude-developed controller recovered the correct laser lock in 695 of 700 trials. That pilot concerned conventional control software, not quantum-circuit design, and the controller runs without AI.

““What is exciting here is that AI, guided by a rigorous evaluator, found new circuit structures that work more efficiently within that constraint.””

— Mikhail Lukin, QuEra co-founder and chief science officer, and Harvard professor

Limits of the Resource Estimates

The findings are reported in a preprint, and the supplied material does not establish that the work has undergone peer review. The circuits were evaluated computationally; the researchers have not reported executing these designs on a quantum processor. It is also unclear how much each component’s savings would carry over to full applications, or what physical-qubit counts and runtimes a particular hardware architecture would require.

The reported 9.9-fold and 39-fold results refer to a specified combined resource metric, not reductions in runtime. The modular-inversion method also involves a trade-off: in one point-addition benchmark, a design used about 17 times fewer gates than the prior design with the fewest qubits, while using about 12% more qubits. Those figures describe different resource choices, rather than a uniform reduction in every measure.

Further Testing on Full Algorithms

The next step is to determine whether the proposed circuits can be incorporated into complete quantum algorithms and whether their estimated savings hold under realistic hardware constraints. The source material does not announce a hardware demonstration, a release schedule for additional results or a specific follow-up milestone.

Readers should watch for peer-reviewed publication, implementation details and tests on quantum hardware. Such evidence would help show how the circuit-level estimates translate into application-level resource needs and clarify which of the reported designs are most useful in practice.

Key Questions

What did the researchers use AI to do?

They used Claude to propose and refine quantum circuit designs. A separate automated evaluator checked correctness and scored each design’s Toffoli-gate and qubit requirements.

Were the circuits tested on a quantum computer?

No hardware run is reported in the supplied material. The results are resource estimates for circuit building blocks, not demonstrations on a quantum processor.

What does the reported 39-fold reduction mean?

It refers to the study’s combined resource metric, calculated by multiplying Toffoli-gate count by peak logical-qubit count for a fixed-point Gaussian function. It does not mean the calculation runs 39 times faster.

Did every circuit improve on both measures?

No. The team reported lower gate and qubit requirements in seven of eight building blocks. For the remaining case, it found a new modular-inversion approach that offers different trade-offs between gate count and qubit use.

Has the research been peer reviewed?

The supplied source identifies the work as an arXiv preprint. It does not confirm peer review.

Source: thequantuminsider.com

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